View TDA8730_172084.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
DATA SHEET
TDA8730 PLL FM demodulator for DBS signals
Preliminary specification File under Integrated Circuits, IC02 March 1991
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
FEATURES * Broadband IF amplifier * PLL demodulator, consisting of: - a multiplier - a voltage controlled oscillator - a loop amplifier * AGC detector and DC amplifier * LOW impedance video and data output * Power supply voltage stabilizer GENERAL DESCRIPTION The TDA8730 is a sensitive PLL demodulator for the second IF and direct broadcasting satellite (DBS) receivers. It provides AGC output and threshold adjustment for optimal signal level at the input of the demodulator.
TDA8730
QUICK REFERENCE DATA SYMBOL VDD IDD VI fosc fosc VO VAGC Note 1. f = 13.5 MHz (peak-to-peak value) ORDERING AND PACKAGE INFORMATION EXTENDED TYPE NUMBER TDA8730 Note 1. SOT38-1; 1996 December 4. PACKAGE PINS 16 PIN POSITION DIL MATERIAL plastic CODE SOT38GE(1) supply voltage supply current input voltage level minimum oscillator frequency maximum oscillator frequency video output signal amplitude (peak-to-peak value) AGC output voltage note 1 PARAMETER CONDITIONS MIN. - - - - - - 1.8 TYP. 9 75 70 130 720 1.1 - MAX. - - - - - - VDD UNIT V mA dBV MHz MHz V V
March 1991
2
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
PINNING SYMBOL AGCO AGCFC OSCIN1 GND OSCIN2 GND1 VDO FI VO GND2 SDN VDD RFIN2 RFIN1 Fig.1 Pinning diagram. RFGND AGCTS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PIN AGC output
TDA8730
DESCRIPTION AGC frequency compensation oscillator input 1 GND oscillator input 2 ground 1 variable capacitor drive output feedback input video output ground 2 stabilizer decoupling node supply voltage +9 V RF input 2 RF input 1 RF ground AGC threshold setting
APPLICATIONS Direct broadcasting satellite (DBS) receivers.
March 1991
3
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
Fig.2 Block diagram.
March 1991
4
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
FUNCTIONAL DESCRIPTION The TDA8730 is a PLL FM demodulator intended for use in satellite tuners. It can demodulate frequency deviations ranging from 13.5 MHz(p-p) (DBS services) up to 25 MHz(p-p) (FSS services) and offers a high demodulation linearity. The circuit is optimized for operation at 479.5 MHz (the European IF for satellite tuners) and can handle the various broadcasting standards that are in use (including MAC). Due to the PLL principle, demodulation noise threshold extension is possible. The high sensitivity of the balanced IF input reduces the additional gain, required in the tuner. An on chip AGC circuit delivers a gain control signal for use by the tuner IF amplifier, and a voltage regulator makes the circuit insensitive supply voltage changes. LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134) SYMBOL VDD IDD IO(source) VAGC tsc VAGC(adj) Tstg Tj Tamb PARAMETER supply voltage input voltage output source current AGC output voltage max short circuit time of outputs AGC threshold adjustment voltage storage temperature junction temperature operating ambient temperature MIN. -0.3 -0.3 - - 10 -0.3 -55 - -25
TDA8730
MAX. 11 VDD 10 11 - VDD 150 150 85
UNIT V V mA V s V C C C
THERMAL RESISTANCE SYMBOL Rth j-a PARAMETER from-junction-to-ambient in free air TYP. 55 MAX. - UNIT K/W
March 1991
5
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
CHARACTERISTICS VDD = 9 V; Tamb = 25 C; f = 480 MHz; Input level 70 dBV; measured in circuit of Fig.4 unless otherwise specified. SYMBOL Supply VDD IDD fosc fosc Vi supply voltage supply current Vpin 12 to pin 10 or pin15 Ipin 12; note 1 - - pin 13; note 2 8.1 - - - - - - - - pin 7 to pin 8 pin 8 pin 7 note 4 pin 9 - - - - - - 9.0 75 9.9 90 - - 74 V mA PARAMETER CONDITIONS MIN. TYP. MAX . UNIT
Frequency demodulator minimum oscillator frequency maximum oscillator frequency operating input level input reflection coefficient S11 S11 unbalanced; pin 14 decoupled (50 reference) balanced; 100 reference Kd Ko Ao f-3 dB Zin Zout le phase detector constant VCO constant open loop gain of loop amplifier open loop bandwidth of loop amplifier input impedance of feedback input output impedance of loop amplifier VCO linearity error over f = 10 MHz shift of DC level at video output for VDD = 10% with unmodulated 480 MHz input signal drift of DC level at video output for Tamb = 25 to 50 C with unmodulated 480 MHz input signal VVCO Gd d MOD AGC VIAGC AGC threshold (IAGC = 0 mA) as a function of voltage applied to pin 16 Vpin16 = 0.8 V Vpin 16 = 9.0 V AGC steepness AGC output saturation voltage HIGH at I = -0.2 mA AGC output saturation voltage LOW at I = 0.2 mA note 7 pin 1; note 8 Vpin 1 to pin 10 or pin 15 pin 13 - 73 - - - 18 67 - - VDD 2.3 dBV dBV mA/dB V V VCO capture range differential gain differential phase intermodulation note 5 note 5 note 6 pin 13; note 3 pin 13 to pin 14 (level at pin 13 is 70 dBV) 0.07 0.11 0.45 12 40 2.8 930 30 1 - - - - - - - - 50 - 50 V/rad. MHz/V dB MHz % mV 130 720 70 MHz MHz dBV
pin 9
-
-
+50
mV
14 - - -
- - - -70
- 4 2 -
MHz % deg. dB
VDD-0.5 - - 1.8
March 1991
6
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
SYMBOL Video output VO VO(DC) ZO ZL Vref Vreg Iload Notes
PARAMETER
CONDITIONS
MIN.
TYP.
MAX .
UNIT
video output signal amplitude (f = 13.5 MHz p-p) DC level of video output output impedance AC load impedance reference voltage for Iload 1 mA line regulation 8.1 V VIN 9.9 V allowable load current
pin 9 to pin 10 or pin 15 pin 9 to pin 10 or pin 15; note 9 pin 9 pin 9; note 10
- 3.1 - 600 - - -1
1.1 3.5 30 -
- 3.9 50 - - - 0
V V
Voltage regulator pin 11; note 11 pin 11 pin 11 7 70 - V mV mA
1. The supply current is the consumption of the circuit only. The current consumption of this application is given by the addition of the supply current of the circuit plus the current consumption of external components in the application given. In this event (Fig.4) the typical current is 80 mA. 2. The circuit of Fig.4 is designed for an input level of 70 dBV. The maximum allowable input level for PLL design is 74 dBV. However, for levels other than 70 dBV the optimum loop filter values will be different from those given in Fig.4. 3. In the application circuit of Fig.4 the RF input is asymmetrically driven. In order to reduce the influence of oscillator signal coupling to the RF inputs, it is recommended to use a symmetrical drive at both inputs. 4. The linearity is specified as the maximum difference between the slope df/dV at the channel centre frequency (480 MHz) and the slope at 480 MHz 10 MHz. 5. Measurements with test signals in accordance with CCIR Rec. 473-3; Fm signal with DBS parameters: pre-and de-emphasis in accordance with CCIR Rec. 405-1, 625 lines PAL TV system. Modulator sensitive 13.5 MHz/V at pre-emphasis cross over frequency 1 V(p-p) video signal at pre-emphasis filter input. 6. For the intermodulation measurement, an FM test signal is applied having the following modulating components: 1.5 MHz reference sinewave with a deviation of 9.45 MHz(p-p), 5.5 and 5.75 MHz sinewaves with deviation 5.6 MHz(p-p) (so 4.5 dB below the reference, see Fig.3). At the demodulator output the 2nd order intermodulation is defined according to Fig.3. The video output is loaded with 500 resistor + DC blocking capacitor. 7. The voltage applied at pin 16 is allowed to be higher than the minimum supply voltage (8.1 V). 8. The voltage at the AGC output (pin 1) decreases when the RF input level at pin 13 increases above the adjusted AGC threshold. 9. The DC level at the video output decreases when the RF input frequency increases. The DC level at the video output (pin 9) is measured with the VCO switched off because when the oscillator is operating, the DC level is dependent on the application (oscillator into the input). 10. The load impedance must have at least the minimum value for a frequency range from DC to the bandwidth of the i.f. filter (usually 27 MHz) since wide-band noise components will also appear at the video output. 11. It is possible to use the regulator output voltage (pin 11). The maximum current allowed is 1 mA. Possible application as voltage reference source for AFC circuit.
March 1991
7
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
TDA8730
Fig.3 IM2 product.
Fig.4 Application information.
March 1991
8
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
PACKAGE OUTLINE DIP16: plastic dual in-line package; 16 leads (300 mil); long body
TDA8730
SOT38-1
D
seating plane
ME
A2
A
L
A1
c Z e b1 b 16 9 MH wM (e 1)
pin 1 index E
1
8
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.7 0.19 A1 min. 0.51 0.020 A2 max. 3.7 0.15 b 1.40 1.14 0.055 0.045 b1 0.53 0.38 0.021 0.015 c 0.32 0.23 0.013 0.009 D (1) 21.8 21.4 0.86 0.84 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.9 3.4 0.15 0.13 ME 8.25 7.80 0.32 0.31 MH 9.5 8.3 0.37 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT38-1 REFERENCES IEC 050G09 JEDEC MO-001AE EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-10-02 95-01-19
March 1991
9
Philips Semiconductors
Preliminary specification
PLL FM demodulator for DBS signals
SOLDERING Introduction
TDA8730
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
March 1991
10

▲Up To Search▲

Price & Availability of TDA8730

	To Download TDA8730 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .